Publications

Peer-Reviewed Conference Publications

ICCAD2022: S. Islam, S. Zhou, R. Ran, Y. Jin, W. Wen, C. Ding and M. Xie, “ EVE: Environmental Adaptive Neural Network Models for Low-power Energy Harvesting System ”, Proc. ACM/IEEE 41st International Conference on Computer-Aided Design (ICCAD), San Diego, CA, Nov. 2022, pp. 1-8. (Acceptance Rate: 132/586=~22.5%)
DAC2022: H. Peng, S. Huang, S. Chen, B. Li, W. Jiang, W. Wen, J. Bi, H. Liu, and C. Ding, “ A Length Adaptive Algorithm-Hardware Co-design of Transformer on FPGA Through Sparse Attention and Dynamic Pipelining ”, Proc. ACM/IEEE 59th Design Automation Conference (DAC), San Francisco, CA, July 2022, pp. 1-6. (Acceptance Rate: 223/987=~23%, Top Ranked, Selected as Publicity Paper)
ASPDAC2022: A. Yu, N. Lyu, W. Wen and Z. Yan “Reliable Memristive Neural Network Accelerators Based on Early Denoising and Sparsity Induction ”, Proc. ACM/IEEE 27th Asia and South Pacific Design Automation Conference (ASPDAC), Jan. 2022, pp. 598-603.
HOST2021: F. Hosseini, Q. Liu, F. Meng, C. Yang, and W. Wen, “Safeguarding the Intelligence of Neural Networks with Built-in Light-weight Integrity MArks (LIMA) ”, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Dec. 2021, pp. 1-12.
EMSOFT2021: F. Hosseini, F. Meng, C. Yang, W. Wen, and R. Cammarota, “Tolerating Defects in Low-power Neural Network Accelerators via Retraining-free Weight Approximation ”, ACM SIGBED International Conference on Embedded Software (EMSOFT), Oct. 2021 (Virtual), pp. 1-21.
DAC2021: P. Zhao, G. Yuan, Y. Cai, W. Niu, Q. Liu, W. Wen, B. Ren, Y. Wang and X. Lin, “Neural Pruning Search for Real-Time Object Detection of Autonomous Vehicles ”, Proc. ACM/IEEE 58th Design Automation Conference (DAC), San Francisco, CA, Dec. 2021, pp. 835-840. (Acceptance rate: 23%)
DAC2021: J. Xie, P. He and W. Wen, “Efficient Implementation of Finite Field Arithmetic for Binary Ring-LWE Post-Quantum Cryptography Through a Novel Lookup-Table-Like Method ”, Proc. ACM/IEEE 58th Design Automation Conference (DAC), San Francisco, CA, Dec. 2021, pp. 1279-1284. (Acceptance rate: 23%)
ACSAC2020: Tao Liu, Zihao Liu, Qi Liu, Wujie Wen, Wenyao Xu, Ming Li, “StegoNet: Turn Deep Neural Network into a Stegomalware ”, Proc. ACM 36th Annual Computer Security Application Conference (ACSAC), Austin, TX, Dec. 2020, PP. 928-938. (Acceptance rate: 70/302=23%)
ICCAD2020: Qi Liu, Wujie Wen, and Yanzhi Wang, “Concurrent Weight Encoding-based Detection for Bit-Flip Attack on Neural Network Architecture ”, Proc. ACM/IEEE 39th International Conference on Computer-Aided Design (ICCAD), Nov. 2020, pp. 1-8.
ICCAD2020: Chao Zhang, Khaled Abdelaal, Angel Chen, Xinhui Zhao, Wujie Wen, and Xiaochen Guo, “ECC Cache: A Lightweight Error Detection for Phase-Change Memory Stuck-At Faults”, Proc. ACM/IEEE 39th International Conference on Computer-Aided Design (ICCAD), Nov. 2020, pp. 1-9.
ECCV2020: Xiaolong Ma, Wei Niu, Tianyun Zhang, Sijia Liu, Sheng Lin, Hongjia Li, Wujie Wen, Xiang Chen, Jian Tang, Kaisheng Ma, Bin Ren, and Yanzhi Wang, “An Image Enhancing Pattern-based Sparsity for Real-time Inference on Mobile Devices”, Proc. of the 16th European Conference on Computer Vision (ECCV), Sep. 2020, pp. 1-16 (Acceptance rate: 1361/5025=27%)
MICCAI2020: Qi Liu, Han Jiang, Tao Liu, Zihao Liu, Sicheng Li, Wujie Wen and Yiyu Shi, "Defending Deep Learning-based Biomedical Image Segmentation from Adversarial Attacks: A Low-cost Frequency Refinement Approach”, the 23rd International Conference on Medical Image Computing and Computer Assisted Intervention (MICCAI) , Lima, Peru, Oct 2020, pp. 1-9. (Early Accept)
MICCAI2020: Zihao Liu, Sicheng Li, Yen-kuang Chen, Tao Liu, Qi Liu, Xiaowei Xu,Yiyu Shi and Wujie Wen, "Orchestrating Medical Image Compression and Remote Segmentation Networks”, the 23rd International Conference on Medical Image Computing and Computer Assisted Intervention (MICCAI) , Lima, Peru, Oct 2020, pp. 1-10. (Early Accept)
DAC2020: Nuo Xu, Qi Liu, Tao Liu, Zihao Liu, Xiaochen Guo and Wujie Wen, “Stealing Your Data from Compressed Machine Learning Models”, Proc. ACM/IEEE 57th Design Automation Conference (DAC), San Francisco, CA, 2020, pp. 1-6. (Acceptance rate: 228/991=23.0%)
DAC2020: Qi Liu, Tao Liu, Zihao Liu, Wujie Wen and Chengmo Yang, “Monitoring the Health of Emerging Neural Network Accelerators with Cost-effective Concurrent Test”, Proc. ACM/IEEE 57th Design Automation Conference (DAC), San Francisco, CA, 2020, pp. 1-6. (Acceptance rate: 228/991=23.0%)
ASP-DAC2020: Xiaolong Ma, Geng Yuan, Sheng Lin, Caiwen Ding, Fuxun Yu, Tao Liu, Wujie Wen, Xiang Chen, and Yanzhi Wang, "Tiny but Accurate: A Pruned, Quantized and Optimized Memristor Crossbar Framework for Ultra Efficient DNN Implementation", Proc. ACM/IEEE 25th Asia and South Pacific Design Automation Conference (ASP-DAC 2020), Jan. 2020, pp. 301-306. (Acceptance rate: 86/279=30%)
ICCAD2019: Tao Liu and Wujie Wen, “Making the Fault-Tolerance of Emerging Neural Network Accelerators Scalable”, Proc. ACM/IEEE 38th International Conference on Computer-Aided Design (ICCAD), Nov. 2019, pp. 1-5. (Invited Tutorial)
CVPR2019: Zihao Liu, Xiaowei Xu, Tao Liu, Qi Liu, Yanzhi Wang, Yiyu Shi, Wujie Wen, Meiping Huang, Haiyun Yuan and Jian Zhuang, “Machine Vision Guided 3D Medical Image Compression for Efficient Transmission and Accurate Segmentation in the Clouds”, 2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2019, Long Beach, CA, pp. 12687-12696. [PDF]
CVPR2019: Zihao Liu, Qi Liu, Tao Liu, Nuo Xu, Xue Lin, Yanzhi Wang, and Wujie Wen, “Feature Distillation: DNN-Oriented JPEG Compression Against Adversarial Examples”, 2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2019, Long Beach, CA, pp. 860-868. [PDF] [CODE]
DAC2019: Tao Liu, Wujie Wen, Lei Jiang, Yanzhi Wang, Chengmo Yang, and Gang Quan, “A Fault-Tolerant Neural Network Architecture”, Proc. ACM/IEEE Design Automation Conference (DAC), Las Vegas, NV, 2019, pp. 1-6. (Acceptance rate: 202/815=24.8%)
HPCA2019: Z. Li, C. Ding, S. Wang, W. Wen, Y. Zhuo, C. Liu, Q. Qiu, W. Xu, X. Lin, X. Qian, and Y. Wang, “E-RNN: Design Optimization for Efficient Recurrent Neural Networks in FPGAs”, Proc. of the 25th International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2019, pp. 69-80. (Acceptance rate: 46/233=19.7%)
CCGRID2019: S. Homsi, G. Quan, W. Wen, G. A. Chapparo-Baquero and L. Njilla, “Game Theoretic-Based Approaches for Cybersecurity-Aware Virtual Machine Placement in Public Cloud Clusters”, the 19th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID), May 2019, pp. 272-281. (Acceptance rate: 47/207=22.7%)
AAAI2019: Y. Wang, Z. Zhan, J. Tang, B. Yuan, L. Zhao, W. Wen, S. Wang, and X. Lin , “Universal Approximation Property and Equivalence of Stochastic Computing-based Neural Networks and Binary Neural Networks”, Proc. of the 33rd AAAI Conference on Artificial Intelligence (AAAI), Feb. 2019, pp. 5369-5376. (Acceptance rate: 1150/7095=16.2%)
WiSec2019: T. Liu and W. Wen, “Deep-evasion: Turn deep neural network into evasive selfcontained cyber-physical malware: poster”, Proceedings of the 12th Conference on Security and Privacy in Wireless and Mobile Networks (WiSec), May 2019, pp. 320-321.
ASP-DAC2019: T. Liu, N. Xu, Q. Liu, Y. Wang, and W. Wen, “A System-level Perspective to Understand the Vulnerability of Deep Learning Systems”, Proc. ACM/IEEE 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2019, pp. 506-511. (Invited Special Session)
ICCAD2018: S. Wang, X. Wang, P. Zhao, W. Wen D. Kaeli, P. Chin, and X. Lin, “Defensive dropout for hardening deep neural networks under adversarial attacks”, IEEE/ACM International Conference On Computer Aided Design (ICCAD), Nov. 2018, pp. 71:1-71:8. (Best Paper Award Nomination, Acceptance rate: 98/396=25%)
ICCAD2018: Q. Lou, W. Wen and L. Jiang, “3DICT: A Reliable and QoS Capable Mobile Process-In-Memory Architecture for Lookup-based CNNs in 3D XPoint ReRAMs”, IEEE/ACM International Conference On Computer Aided Design (ICCAD), Nov. 2018, pp. 53:1-53:8. (Best Paper Award Nomination from track-Hardware for Embedded Systems, Acceptance rate: 98/396=25%)
ECCV2018: T. Zhang, S. Ye, K. Zhang, J. Tang, W. Wen, M. Fardad, and Y. Wang, “A Systematic DNN Weight Pruning Framework using Alternating Direction Method of Multipliers”, Proc. of the 15th European Conference on Computer Vision (ECCV), Sep. 2018, pp. 1-16.(Acceptance rate: 717/2439=29%)
DAC2018: Zihao Liu, Tao Liu, Wujie Wen, Lei Jiang, Jie Xu, Yanzhi Wang and Gang Quan, “DeepN-JPEG: A Deep Neural Network Favorable JPEG-based Image Compression Framework”, 2018 55th IEEE/EDAC/ACM Design Automation Conference (DAC), June 2018. (Acceptance rate 168/691=24.3%)
HOST2018: Tao Liu, Wujie Wen and Yier Jin, “SIN2: Stealth Infection on Neural Network – A Low-cost Agile Neural Trojan Attack Methodology”, Proc. IEEE 11th International Symposium on Hardware Oriented Security and Trust (HOST), Washington, DC, May 2018, pp. 227-230. (Acceptance rate~26%)
ASP-DAC2018: Q. Liu, T. Liu, Z. Liu, Y. Wang, Y. Jin and W. Wen, “Security Analysis and Enhancement of Model Compressed Deep Learning Systems under Adversarial Attacks", Proc. ACM/IEEE 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2018, pp. 721-726. (Best Paper Award Nomination, 11 out of 271 papers)
ASP-DAC2018: T. Liu, L. Jiang, Y. Jin, G. Quan and W. Wen, “PT-Spike: A Precise-Time-Dependent Single Spike Neuromorphic Architecture with Efficient Supervised Learning,” Proc. ACM/IEEE 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2018, pp. 568-573. ( Best Paper Award Nomination, 11 out of 271 papers)
ISVLSI2018: Z. Liu, T. Liu, J. Guo, N. Wu and W. Wen, “An ECC-Free MLC STT-RAM Based Approximate Memory Design for Multimedia Applications”, Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2018, pp. 142-147. (Oral Acceptance rate: 57/192=29%)
ISVLSI2018: T. Liu, Z. Liu, Q. Liu andW. Wen, “Enhancing the Robustness of Deep Neural Networks from "Smart" Compression”, Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2018, pp. 528-532. (Invited Special Session)
ICC2018: Hang Wu, Lixing Chen, Cong Shen, Wujie Wen and Jie Xu, “Online Geographical Load Balancing for Energy-Harvesting Mobile Edge Computing”, IEEE International Conference on Communications (ICC) 2018 Green Communications Systems and Networks Symposium, May. 2018, pp. 1-6.
GOMACTech: Tao Liu, Yier Jin, and Wujie Wen, “Trojan Attacks and Defenses on Deep Neural Network based Intelligent Computing Systems", Government Microcircuit Applications and Critical Technology Conference (GOMACTech-18), pp. 1-4, 2018.
ICCAD2017: Tao Liu, Zihao Liu, Fuhong Lin, Yier Jin, Gang Quan, and Wujie Wen, “MT-Spike: A Multilayer Time-based Spiking Neuromorphic Architecture with Temporal Error Backpropagation", Proc. ACM/IEEE International Conference on Computer-Aided Design (ICCAD), Nov. 2017, pp. 1-8. (Best Paper Nomination from track-Hardware for Embedded Systems, Acceptance rate: 105/399=26%).
ISLPED2017: L. Jiang, M. Kim, W. Wen and D. Wang, “XNOR-POP: A Processing-in-Memory Architecture for Binary Convolutional Neural Networks in Wide-IO2 DRAMs", Proc. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2017, pp. 1-6. (Acceptance rate: 24%)
IGSC2017: Gustavo A. Chaparro-Baquero, Shi Sha, Soamar Homsi, Wujie Wen, Gang Quan, “Thermal-aware Joint CPU and Memory Scheduling for Hard Real-time Tasks on Multicore 3D Platforms", 2017 Eighth International Green and Sustainable Computing Conference (IGSC), Oct. 2017, pp. 1-8.
ASP-DAC2017: Z. Liu, W. Wen, L. Jiang, Y. Jin, and G. Quan, “A Statistical STT-RAM Retention Model for Fast Memory Subsystem Designs", Proc. ACM/IEEE 21th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2017, pp. 720-725. (Acceptance rate: 111/358 = 31%)
ASP-DAC2017: X. Yang and W. Wen, “Design of A Pre-scheduled Data Bus (DBUS) for Advanced Encryption Standard (AES) Encrypted System-on-Chips (SoCs)", Proc. ACM/IEEE 21th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2017, pp.506-511. (Acceptance rate: 111/358= 31%)
ASP-DAC2017: A. Ren, S. Liu, R. Cai, W. Wen, P. Varshney and Y. Wang, “Algorithm-Hardware Co-optimization of Memristor-Based Framework for Solving SOCP and Homogeneous QCQP Problems", Proc. ACM/IEEE 21th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2017, pp. 788-793. (Acceptance rate: 111/358 = 31%)
GLSVLSI2017: L. Jiang, S. Mittal, and W. Wen, “Building a Fast and Power Efficient Inductive Charge Pump System for 3D Stacked Phase Change Memories", Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017, pp. 275-280. (Full Paper Acceptance rate: 48/197=24.4%)
GLSVLSI2017: S. Sha, W. Wen, S. Ren and G. Quan, “A Thermal-Balanced Variable-Sized-Bin-Packing Approach for Energy Efficient Multi-Core Real-Time Scheduling", Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017, pp. 257-262. (Full Paper Acceptance rate: 48/197=24.4%)
ISQED2017: T. Liu, and W. Wen, “A Fast and Ultra Low Power Time-Based Spiking Neuromorphic Architecture for Embedded Applications", Proc. IEEE 18th International Symposium on Quality Electronic Design (ISQED), Mar. 2017, pp. 19-22. (Invited Special Session)
ISQED2017: G. Chaparro-Baquero, S. Sha, S. Homsi, W. Wen and G. Quan, “Processor/Memory Co-scheduling Using Periodic Resource Server for Real-Time System Under Peak Temperature Constraints", Proc. IEEE 18th International Symposium on Quality Electronic Design (ISQED), Mar. 2017, pp. 360-366.
DATE2016: W. Wen, M. Mao, H. Li, Y. Chen, Y. Pei and N. Ge, “A Holistic Tri-region MLC STT-RAM Design with Combined Performance, Energy, and Reliability Optimizations", Proc. ACM/IEEE Design, Automation & Test in Europe (DATE), Mar. 2016, pp. 1285-1290. (Best Paper Award Nomination, 13 out of 829, top 1.5%).
ICCAD2016: C. Yang, B. Liu, W. Wen, M. Barnell, Q. Wu, H. Li, Y. Chen and J. Rajendran, “Security of Neuromorphic Computing: Thwarting Learning Attacks Using Memristor’s Obsolescence Effect", Proc. ACM/IEEE International Conference on Computer Aided Design (ICCAD), Nov. 2016, pp. 1-6. (Acceptance rate: 97/408 = 24%)
ICCAD2016: S. Li, W. Wen, Y. Wang, Q. Qiu, Y. Chen and H. Li, “A Data Locality-aware Design Framework for Reconfigurable Sparse Matrix-Vector Multiplication Kernel", Proc. ACM/IEEE International Conference on Computer Aided Design (ICCAD), Nov. 2016, pp. 1-6. (Acceptance rate: 97/408 = 24%)
ICPP2016: S. Sha, W. Wen, M. Fan, S. Ren and G. Quan, “Performance Maximization via Frequency Oscillation on Temperature Constrained Multicore Processors", Proc. ACM/IEEE International Conference on Parallel Processing (ICPP), Aug. 2016, pp. 526-535. (Acceptance rate: 53/251 = 21.1%)
DAC2016: X. Chen, N. Khoshavi, J. Zhou, D. Huang, R. DeMara, J. Wang, W. Wen and Y. Chen, “AOS: Adaptive Overwrite Scheme for Energy-Efficient MLC STT-RAM Cache", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2016, pp. 1-6. (Acceptance rate: 152/878 = 17.3%)
DAC2016: T. W, Q. Han, S. Sha, W. Wen, G. Quan and M. Qiu, “On Harmonic Fixed-Priority Scheduling of Periodic Real-Time Tasks with Constrained Deadlines", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2016, pp. 1-6. (Acceptance rate: 152/878 = 17.3%)
DAC2016: E. Eken, L. Song, I. Bayram, C. Xu, W. Wen, Y. Xie and Y. Chen, “NVSim-VXs: An Improved NVSimfor Variation Aware STT-RAM Simulation", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2016, pp. 1-6. (Acceptance rate: 152/878 = 17.3%)
DAC2016: M. Mao, W. Wen, X. Liu, J. Hu, D. Wang, Y. Chen and H. Li, “TEMP: Thread Batch Enabled Memory Partitioning for GPU", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2016, pp. 1-6. (Acceptance rate: 152/878 = 17.3%)
DATE2016: X. Wang, M. Mao, E. Eken, W. Wen, H. Li and Y. Chen, “Sliding Basket: An Adaptive ECC Scheme for Runtime Write Failure Suppression of STT-RAM Cache", Proc. ACM/IEEE Design, Automation & Test in Europe (DATE), Mar. 2016, pp. 762-767. (Acceptance rate: 199/824 = 24.0%).
ASP-DAC2016: L. Jiang, W. Wen, D.Wang and L. Duan, “Improving Read Performance of STT-MRAM based Main Memories through Smash Read and Flexible Read", Proc. ACM/IEEE 21th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2016, pp. 31-36. (Acceptance rate: 94/274 =34.3%)
ASP-DAC2016: X. Zhang, G. Sun, Y. Zhang, W. Wen, Y. Chen, H. Li, “A Novel PUF based on Cell Error Rate Distribution of STT-RAM", Proc. ACM/IEEE 21th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2016, pp. 342-347. (Acceptance rate: 94/274 = 34.3%)
ISVLSI2016: K. Shamsi, Y. Jin and W. Wen, “Hardware Security Challenges Beyond CMOS: Attacks and Remedies", Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2016, pp. 200-205 (Invited Special Session).
ISVLSI2016: B. Li, Y. Pei and W. Wen, “Efficient Low-Density Parity-Check (LDPC) Code Decoding for Combating Asymmetric Errors in STT-RAM", Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2016, pp. 266-271. (Acceptance rate~30%)

Until 2015

DAC2015: J. Guo, W. Wen, J. Hu, D. Wang, H. Li and Y. Chen, “FlexLevel: a Novel NAND Flash Storage System Design for LDPC Latency Reduction", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2015, pp. 1-6. (Acceptance rate: 162/789=20.5%)
DAC2014: W. Wen, Y. Zhang, M. Mao and Y. Chen, “State-Restrict MLC STT-RAM Designs for High-Reliable High-Performance Memory System", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2014, pp. 1-6. (Best Paper Award Nomination, 7 out of 787, 0.9%)
DAC2014: M. Mao, W. Wen, Y. Zhang, H. Li and Y. Chen, “Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2014, pp. 1-6. (Acceptance rate: 174/787 = 22.1%)
DAC2014: E. Eken, Y. Zhang, W. Wen, R. Joshi, H. Li and Y. Chen, “A New Field-Assisted Access Scheme of STT-RAM with Self-Reference Capability", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2014, pp. 1-6. (Acceptance rate: 174/787 = 22.1%)
ISCE2014: W. Wen, Y. Zhang, M. Mao and Y. Chen, "STT-RAM Reliability Enhancement through ECC and Access Scheme Optimization", International Symposium on Consumer Electronics, Jun. 2014, pp. 1-2.
ICCAD2013: W. Wen, M. Mao, X. Zhu, S. Kang, D. Wang and Y. Chen, "CD-ECC: ContentDependent Error Correction Codes for Combating Asymmetric Nonvolatile Memory Operation Errors", Proc. ACM/IEEE International Conference on Computer Aided Design (ICCAD), Nov. 2013, pp. 1-8. (Acceptance rate: 92/354 = 26%)
DATE2013: J. Guo, W. Wen, and Y. Chen, "DA-RAID-5: A Disturb Aware Data Protection Technique for NAND Flash Storage Systems", Proc. ACM/IEEE Design, Automation & Test in Europe (DATE), Mar. 2013, pp. 380-385. (Acceptance rate: 92/354 = 26.0%)
ASP-DAC2013: W. Wen, Y. Zhang, L. Zhang and Y. Chen, "Loadsa: A Yield-Driven TopDown Design Method for STT-RAM Array", Proc. ACM/IEEE 18th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2013, pp. 291-296. (Acceptance rate ∼31.2%)
DAC2012: W. Wen, Y. Zhang, Y. Chen, Y. Wang and Y. Xie, "PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability Analysis Method", Proc. ACM/IEEE Design Automation Conference (DAC), Jun. 2012, pp. 1191-1196. (Acceptance rate: 168/741 = 23%)
ICCAD2012: Y. Zhang, L. Zhang, W. Wen, G. Sun and Y. Chen, "Multi-level Cell STT-RAM: Is It Realistic or Just a Dream?" Proc. ACM/IEEE International Conference on Computer Aided Design (ICCAD), Nov. 2012, pp. 526-532. (Acceptance rate: 82/338 = 24.3%)

Peer-Reviewed Journal Publications

TNNLS2021: Q. Liu and W. Wen, "Model Compression Hardens Deep Neural Networks: A New Perspective to Prevent Adversarial Attacks", IEEE Transactions on Neural Networks and Learning Systems (TNNLS), 2021, June 2021, pp. 1-12.
TODAES2020: S. Sha, A. Bankar, W. Wen and G. Quan, "On Fundamental Principles for ThermalAware Design on Periodic Real-Time Multi-Core Systems", ACM Transactions on Design Automation of Electronic Systems (TODAES), 2020, vol. 25, no. 2, pp. 23:1-23:23.
TCAD2020: C. Yang, B. Liu, H. Li, Y. ChenDA, M. Barnell, Q. Wu, W. Wen and J. Rajendran, "Thwarting Replication Attack against Memristor-based Neuromorphic Computing System", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Oct. 2020, vol. 39, no. 10, pp. 2192-2205.
CCF-Trans2020: T. Liu, G. Quan and W. Wen, "FPT-spike: a Flexible Precise-time-dependent Single-spike Neuromorphic Computing Architecture", CCF Transactions on High Performance Computing (HPC), June 2020, pp. 1-16.
JETC2019 B. Li, M. Mao, X. Liu, T. Liu, Z. Liu, W. Wen, Y. Chen and H. Li, "Thread Batching for High-performance Energy-efficient GPU Memory Design", ACM Journal on Emerging Technologies in Computing Systems (JETC), Dec. 2019, vol. 15, no. 4, pp. 39:1-39:21.
PARCO2019 S. Sha, W. Wen, G. Chaparro-Baquero and G. Quan, “Thermal-Constrained Energy Efficient Real-Time Scheduling on Multi-Core Platforms", Parallel Computing (PARCO), vol. 85, 2019, pp. 231-242, ISSN 0167-8191, https://doi.org/10.1016/j.parco.2019.01.003.
TPDS2018: S. Sha, W. Wen, S. Ren and G. Quan, “M-Oscillating: Performance Maximization on Temperature-Constrained Multi-Core Processors", IEEE Transactions on Parallel and Distributed Systems (TPDS), Nov. 2018, vol. 29, no. 11, pp. 2528-2539
TCAD2018: Z. Liu, M. Mao, T. Liu, X. Wang, W. Wen, Y. Chen, H. Li, D. Wang, Y. Pei and N. Ge, “TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Oct. 2018, vol. 37, no. 10, pp. 1985-1998
JETC2018: B. Li, Y. Pei and W. Wen, “Efficient LDPC Code Design for Combating Asymmetric Errors in STT-RAM", ACM Journal on Emerging Technologies in Computing Systems (JETC), 2018, vol. 14, no. 1, pp. 10:1-10:20.
JETC2017: X. Yang, W. Wen and F. Ming, “Improving AES Core Performance via An Advanced ASBUS Protocol", ACM Journal on Emerging Technologies in Computing Systems (JETC), 2017, vol. 14, no. 1, pp. 6:1-6:23.
TC2017: M. Mao, W. Wen, Y. Zhang, Y. Chen and H. Li, “An Energy-Efficient GPGPU Register File Architecture Using Racetrack Memory", IEEE Transactions on Computers (TC), Apr. 2017, vol. 66, no. 9, pp. 1478-1490.
TC2017: X. Chen, N. Khoshavi, R. DeMara, J. Wang, J. Zhou, D. Huang, W. Wen, Y. Chen, “Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache", IEEE Transactions on Computers (TC), May. 2017, vol. 66, no. 5, pp. 786-798. (Feature Paper of Month, May, 2017)
TCAD2016: J. Guo, W. Wen, J. Hu, D. Wang, H. Li and Y. Chen, “FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Oct. 2016, vol. 36, no. 7, pp. 1167-1180.
TCAD2014: W. Wen, Y. Zhang, Y. Chen, Y. Wang and Y. Xie, "PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Nov. 2014, vol. 33, no. 11, pp. 1644-1656.
TMAG2014: E. Eken, Y. Zhang, W. Wen, R. Joshi, H. Li, and Y. Chen, "A Novel Self-reference Technique for STT-RAM Read and Write Reliability Enhancement", IEEE Transaction on Magnetics (TMAG), Nov. 2014, vol. 50, no. 11, 3401404.
TMAG2012: Y. Zhang, W. Wen, and Y. Chen, "The Prospect of STT-RAM Scaling from Read ability Perspective", IEEE Transaction on Magnetics (TMAG), vol. 48, no. 1, Nov. 2012, pp. 3035-3038.
SPIN2013: Y. Zhang, W. Wen, and Y. Chen, "STT-RAM Cell Design Considering MTJ Asymmetric Switching", SPIN, vol. 2, no. 3, Nov. 2013, 1240007.
JETC2013: Y. Chen, W. Wong, H. Li, C.-K. Koh, Y. Zhang, and W. Wen, "On-chip Caches built on Multi-Level Spin-Transfer Torque RAM Cells and Its Optimizations", ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 9, no 2, article 16, May 2013.
IET2011: C. Geng, Y. Pei, W. Wen, Z. Luan, N. Ge, "ASIC implementation of fractionally spaced Rake receiver for high data rate UWB", IET Electronic Letters (IET), vol. 47, no. 3, 2011, pp. 215-217.

Book Chapters

Y. Zhang, W. Wen, and Y. ChenDA, "Asymmetry in STT-RAM Cell Operations," (in Emerging Memory Technologies: Design, Architecture, and Applications, Editor: Yuan Xie), Springer, Aug. 31, 2013, ISBN: 978-14-419-9550-6.
W. Wen, Y. Zhang, and Y. ChenDA, "Statistical Reliability/Energy Characterization in STT-RAM Cell Designs," (in Spintronics Based Computing, Editors: Weisheng Zhao and Guillaume Prenat), Springer, Jun. 14, 2015. ISBN:978-3-319-15179-3
Y. Zhang, W. Wen, H. Li, and Y. Chen, "The Prospect of STT-RAM Scaling, (in Metallic Spintronic Devices," Editor: Xiaobin Wang), CRC Press, Aug. 4, 2014. ISBN: 978-14-665-8844-8.