Chao ZhangPh.D. Lehigh University Department of Electrical & Computer Engineering
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I'm was a Ph.D. student in the Department of Electrical and Computer Engineering at Lehigh University. My research mainly focused on a broad area of energy-efficient computer architectures, high-performance computing, graph algorithms, and domain-specific architectures. I graduated in May 2021. |
| B.S. | Electronic Science and Technology | Univ of Electronic Science and Technology of China | 2012-2016 |
| Ph.D. | Electrical Engineering | Lehigh University | 2016-2021 |
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[TACO] Abhishek Singh, Shail Dave, Pantea Zardoshti, Robert Brotzman, Chao Zhang, Xiaochen Guo, Aviral Shrivastava, Gang Tan, Michael Spear “SPX64: A Scratch-pad Memory for General-Purpose Microprocessors”, ACM Transactions on Architecture and Code Optimization (TACO) [PDF] |
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[ICCAD] Chao Zhang, Khaled Abdelaal, Angel Chen, Xinhui Zhao, Wujie Wen, and Xiaochen Guo, "ECC Cache: A Lightweight Error Detection for Phase-Change Memory Stuck-At Faults", in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2020. [PDF] |
| [MICRO] Chao Zhang, Yuan Zeng, John Shalf, and Xiaochen Guo, "RnR: A Software-Assisted Record-and-Replay Hardware Prefetcher", 53th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, Otc. 2020. [PDF] |
| [TC] Chao Zhang, Yuan Zeng, and Xiaochen Guo. “Scrabble: A Fine-Grained Cache with Adaptive Merged Block,” in IEEE Transactions on Computers (TC), vol. 69, no. 1, pp. 112-125, 1 Jan. 2020. [PDF] |
| [MICRO SRC] Chao Zhang, Yuan Zeng, and Xiaochen Guo, "A Fine-Grained Cache with Adaptive Merged Block", Student Research Competition of 51th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO SRC). Fukuoka, Japan, Oct. 2018. [PDF] |
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[ISLPED] Chao Zhang, Xiaochen Guo, "Enabling Efficient Fine-Grained DRAM Activations with Interleaved I/O", in Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), Taipei, Taiwan, Jul. 2017. [PDF] |