Xiaochen Guo

 

Assistant Professor

Department of Electrical & Computer Engineering


Office:     Sherman Fairchild Lab Room 311

                16A Memorial Drive East

                Bethlehem, PA 18015

Phone:    610-758-4421

Email:     xig515 AT lehigh DOT edu

I am an assistant professor in the Department of Electrical and Computer Engineering at Lehigh University. I received my Ph.D. degree in Electrical and Computer Engineering from the University of Rochester in 2015, and B.S. degree from Beihang University in 2009. My research interests are in the broad area of computer architecture, with an emphasis on leveraging emerging technologies to build energy-efficient architectures. I received the IBM Ph.D. Fellowship twice.


Fully Refereed Archival Publications


Xiaochen Guo, Aviral Shrivastava, Michael Spear, Gang Tan, “Languages Must Expose Memory Heterogeneity”, in Proceedings of the International Symposium on Memory Systems (MEMSYS), Washington, DC, October, 2016.


Qing Guo, Xiaochen Guo, Yuxin Bai, Ravi Patel, Engin Ipek, and Eby G. Friedman, “Resistive TCAM Systems for Data-intensive Computing,” in IEEE Micro special issue on Alternative Compute Designs and Technologies (IEEE Micro), October 2015.


Ravi Patel, Xiaochen Guo, Qing Guo, Engin Ipek, and Eby G. Friedman, “Reducing Switching Latency and Energy in STT-MRAM Caches With Field-Assisted Writing,” in the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), March 2015.


Isaac Richter, Kamil Pas, Xiaochen Guo, Ravi Patel, Ji Liu, Engin Ipek, and Eby G. Friedman, “Memristive Accelerator for Extreme Scale Linear Solvers,” the Government Microcircuit Applications & Critical Technology Conference (GOMAC), St. Louis, MO, March 2015.


Qing Guo, Xiaochen Guo, Ravi Patel, Engin Ipek and Eby G. Friedman, “AC-DIMM: Associative Computing with STT-MRAM,” in Proceedings of the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel, June 2013.


Qing Guo, Xiaochen Guo, Yuxin Bai, and Engin Ipek, “A Resistive TCAM Accelerator for Data Intensive Computing,” in Proceedings of the 44th International Symposium on Microarchitecture (MICRO), Porto Alegre, Brazil, December 2011.


Xiaochen Guo, Engin Ipek and Tolga Soyata, “Resistive Computation: Avoiding the Power Wall with Low-Leakage, STT-MRAM Based Computing,” in Proceedings of the 37th International Symposium on Computer Architecture (ISCA), Saint-Malo, France, June 2010.


Bo Xiao, Liandong Liu, Xiaochen Guo, and Ke Xu, “Modeling the IPv6 Internet AS-level Topology,”Physica A, 388(2009): 529-540. doi: 10.1016/j.physa.2008.10.034.



Book Chapters


Engin Ipek, Qing Guo, Xiaochen Guo, and Yuxin Bai, “Resistive Memories in Associative Computing,” in Emerging Memory Technologies: Design, Architecture, and Applications, Yuan Xie (Editor), Springer, July 2013.



Teaching


ECE 350/450 Special Topics: Memory Systems - Fall 2015, Fall 2016

ECE 401 Advanced Computer Architecture - Spring 2016



Research Group Members


Chao Zhang, EE PhD Student

Marjan Fariborz, EE Master Student

Yuan Zeng, EE Master Student



Professional Activities


Associate Editor: Microelectronics Journal

Conference Program Committee: ISLPED’16, NAS’16, IISWC’16, ICCD’16, IPDPS'17, ISLPED'17



Patents


Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C Hunter, Jude A Rivers, Vijayalakshmi Srinivasan: Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM). U.S. Patent 9,351,899, May 31, 2016.


Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C Hunter, Jude A Rivers, Vijayalakshmi Srinivasan: Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM). U.S. Patent Application 20150206568, July 23, 2015.


Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C Hunter, Jude A Rivers, Vijayalakshmi Srinivasan, “Processor with Memory-Embedded Pipeline for Table-Driven Computation,US20150074356 A1, March 12, 2015.


Xiaochen Guo and Arun Jagatheesan, “Page Merging for Buffer Efficiency in Hybrid Memory Systems,” US8874827, Feb 14, 2013.